This invention relates to circuit testing, and more particularly, to testing input-output circuit features on integrated circuits.
The process of designing and testing modern custom integrated circuits is complex and expensive. Custom circuits, which are sometimes referred to as application-specific integrated circuits (ASICs), offer high performance, but can be costly to produce. Not only must a circuit be designed, but the lithographic mask sets that are used to fabricate the circuit in mass production must be designed and debugged.
Because of the large amount of effort involved in creating custom integrated circuits, it is generally only cost effective to develop a custom integrated circuit when a chip is needed in large volumes. Projects requiring smaller volumes of circuits are often implemented using programmable logic devices.
Programmable logic devices are a type of integrated circuit that can be customized in relatively small batches to implement a desired logic design. In a typical scenario, a programmable logic device manufacturer designs and manufactures uncustomized programmable logic device integrated circuits in advance. Later, a logic designer uses a logic design system to design a custom logic circuit. The logic design system uses information on the hardware capabilities of the manufacturer's programmable logic devices to help the designer implement the logic circuit using the resources available on a given programmable logic device.
The logic design system creates configuration data based on the logic designer's custom design. When the configuration data is loaded into one of the programmable logic devices, it programs the logic of that programmable logic device so that the programmable logic device implements the designer's logic circuit. The use of programmable logic devices in place of ASICs can drastically reduce the amount of effort required to produce a circuit.
To reduce costs and maximize performance when high volumes of programmable logic devices are required, programmable logic device manufacturers generally offer programmable logic devices that can be programmed using lithographic masks. The masks used for mask programming a mask-programmable logic device are much simpler than the lithographic mask sets used in ASICs. For example, a single mask layer might be sufficient to program a mask-programmable device (e.g., by forming a desired pattern of via contacts in a via array).
Because mask-programmed programmable logic devices offer much of the performance and cost benefits of ASICs, they are sometimes referred to as structured ASICs.
The process of implementing a complex circuit design in an electrically-programmed or mask-programmed programmable logic device typically requires testing. Testing can be performed by a manufacturer or by a logic designer.
Testing operations can involve the testing of logic circuitry in the programmable logic device core and the testing of input-output circuits. Input-output circuits generally contain a number of components such as pull-up resistors and clamp diode circuits that are used to provide special input-output circuit features (i.e., a voltage pull-up feature, an over-voltage protection feature, etc.).
The components in an input-output circuit are often interdependent, which makes testing difficult. For example, one cannot test clamp diode by applying an over-voltage if a pull-up circuit is present. With electrically-programmable programmable logic devices, it is possible to test these features independently, by selectively enabling and disabling various features in a series of tests. With mask-programmed programmable logic device integrated circuits, however, this flexibility is not available. Once a circuit is designed, the mask for that circuit creates a pattern of fixed connections in the circuit. The mask is fixed, so the circuit cannot be reconfigured multiple times to perform a series of tests.
Because it is not possible to achieve comprehensive structural test coverage for input-output circuits by varying the programming mask, conventional mask-programmed programmable logic devices have been provided with special test control circuitry. The test control circuitry is controlled by applying appropriate test control signals during testing. By varying the test control signals, the functionality of the circuit can be changed and various input-output circuit features can be tested successfully.
To avoid the need to provide extra pins, the test control signals are applied to the test control circuitry through pins that would otherwise serve as regular input-output pins for the device. This type of arrangement leads to a number of conflicts. For example, when a pin is being used as a test control pin, its voltage may be held at a particular value. When a pin is maintained at a constant voltage level, it is not possible to sense the voltage level on that pin as part of a test. This problem is exacerbated by conventional testing methodologies, which generally require that many test pins be maintained at appropriate fixed values, even if they are not actively being used to control a particular test.
These types of limitations preclude comprehensive structural testing of input-output circuits on a mask-programmed programmable logic device integrated circuit. Structural testing of input-output circuits on other types of integrated circuits can be equally difficult.
It would therefore be desirable to provide improved ways in which to test input-output circuits on integrated circuits.